Memory Map

R3 global memory map is divided into multiple regions as shown in Table 1. The total number of address bits are 32-bit, but we will only use the lower 16-bits per region e.g. 65Kbytes per region. Therefore, bit19-16 are used for region address decoding between the individual regions as illustrated in Figure 1. Each address range gets its own chip select.

For detailed definition for each RMAP, click on provided links under Instance column in Table 1. Note that the RMAP addresses are given as offsets, and must be added to Base address to get the correct address pointer to RMAP register. Example - Common Control base address == 0x10000000, hence Common Control RMAP real address == RMAP offset + 0x10000000 (base).

Table 1 - R3 Global Memory Map

Instance Address RangeSize Description
Reserved 0x00000000-0x0FFFFFFC- Future use
Common Control 0x10000000-0x1000FFFC65K Control Plane register map e.g. SPI, LEDs, and board level IO
Common INTC 0x10010000-0x1001FFFC65K Interrupt Controller map. Individual interrupt lines from all RMAPs are consolidated in a single location. Once an interrupt is set by HW, a status messaging packet is sent to Host. Host shall read the INTC status register to identify which of the RMAP regions has triggered an interrupt e.g. coarse parsing, followed by fine parsing
Timing Control 0x10020000-0x1002FFFC65K address range for timing controller
Ethernet Port 0x10030000-0x1003FFFC65K address range for Tx and Rx Ethernet ports
Packet Processor0x10040000-0x1004FFFC65K address range for packet processor
Tx APP 0x10050000-0x1005FFFC65K address range for Tx Application
Rx APP 0x10060000-0x1006FFFC65K address range for Rx Application
RF Port - DAC 0x10070000-0x1007FFFC65K address range for DAC interfacing module
RF Port - ADC 0x10080000-0x1008FFFC65K address range for ADC interfacing module
Reserved 0x10090000-0xFFFFFFFC- Future use

Figure 1 - R3 Address Decoding


Last modified 7 years ago Last modified on 07/14/10 15:25:47

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