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Changes between Version 18 and Version 19 of crkit/Software/Firmware/Framework/tutorial/build/framework


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Timestamp:
Nov 17, 2010, 7:19:06 PM (11 years ago)
Author:
khanhle
Comment:

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  • crkit/Software/Firmware/Framework/tutorial/build/framework

    v18 v19  
    55
    66 1. Start Xilinx ISE [[BR]][[BR]]
    7  2. Open CRKit project located at `d:\hw\cr_build\cr_r3_sim\'''cr_r3.ise'''` . The opened project should look like as shown in Figure 1. 
     7 2. Open CRKit project located at `d:\hw\cr_build\cr_r3_sim\cr_r3.ise` . The opened project should look like as shown in Figure 1. 
    88
    99__Figure 1 - ISE cr_r3 project__
     
    2020[[BR]][[BR]]
    2121
    22  5. Generate bit file. Right-click on 'Generate Programming File' in processes window, and select run or re-run. Once this step is done, the bit file is available at `d:\hw\cr_build\cr_r3_sim\'''cr_top.bit'''` . [[BR]]
     22 5. Generate bit file. Right-click on 'Generate Programming File' in processes window, and select run or re-run. Once this step is done, the bit file is available at `d:\hw\cr_build\cr_r3_sim\cr_top.bit` . [[BR]]
    2323
    2424 6. Use Xilinx Impact tool to download the bit file onto the FPGA. [[BR]]